Fully differential amplifiers are used in many areas involving the amplification of differential signals over a wide operating frequency range. In particular but not exclusively—these fully differential amplifiers are used to amplify extremely small input signals into output signals that are as free as possible from noise. Fully differential amplifiers generally require a common-mode control for setting a common-mode voltage at the amplifier output. Said common-mode control must satisfy one or both of the following requirements:
(a) a sufficient gain bandwidth of the overall circuit arrangement must be ensured; and
(b) any noise of the overall circuit arrangement must not exceed predetermined limits.
In this case, it should be noted that the boundary condition specified under (b) encompasses 1/f noise, in particular. The two requirements ((a)(b)) mentioned above conflict with one another since a low 1/f noise imposes significant demands on the circuit elements for amplifying the signals. In other words, there is a general requirement for field-effect transistors having a very large gate area, which in turn limit the bandwidth of the common-mode control loop. On the other hand, if transistors having a small gate area are used, then the 1/f noise of the amplifier is increased.
If the gain bandwidth becomes too small, effects such as nonlinearities in the amplifier behavior and a distortion of input signals occur to a notable extent.
Analog circuit arrangements for the differential amplification of input signals are specified according to the prior art. “Analog Integrated Circuit Design” by David Johns, Ken Martin, pages 290-291, discloses a circuit arrangement which encompasses a common-mode control, the common-mode voltage at the amplifier output, minus a DC voltage level for a shift, being generated at a feedback node VA.
This voltage is then compared with a reference voltage Vref using an additional amplifier. Although this approach functions, it has considerable restrictions. These restrictions consist in the fact that the voltage drop across source follower transistors limits the differential signals which can be processed. This limiting has a disadvantageous effect particularly when low supply voltages are used. In addition, the further nodes in the common-mode control loop have the effect that the entire circuit arrangement is more difficult to compensate.
An important consideration in the design of common-mode control circuits is that they have to be compensated. Otherwise, the circuits can become unstable.
A further circuit arrangement for fully differential amplification by means of operational amplifiers with precise output balancing is disclosed in IEEE Journal of Solid State Circuits (1988), Volume 23, No. 6, pages 1410-1414. An operational amplifier with a balanced output is a special case of the known amplifier with a differential output. Amplifiers with a differential output usually contain the common-mode control circuit mentioned. In this case, however, the outputs of specific circuit designs are not balanced.
A further circuit arrangement for common-mode control is disclosed for high-impedance current-mode applications in IEEE Transactions on Circuits and Systems II: “Analog and Digital Processing (2000)” Volume 47, No. 4, pages 363-359, under the title “A continuous-time common-mode feedback circuit (CMFB) for high-impedance current-mode applications” by Lah, L.; Choma, J., Jr. and Draper, J. In this case, a common-mode control stabilizes the common-mode signal.
A main disadvantage of the circuit arrangements according to the prior art is that stability problems occur on account of the introduction of a pole into the common-mode control loop. The occurrence of a pole is unavoidable, in principle, according to the circuit arrangements in the prior art. In the case of a circuit topology according to the prior art, a stabilization of the common-mode control can only be stabilized if the gain bandwidth is shifted toward low frequencies by corresponding circuit measures, so that a pole which occurs in conventional circuit arrangements becomes a dominant pole.
In circuit arrangements according to the prior art, the pole is usually at low frequencies owing to large differential amplifier transistors, so that the differential amplifier circuit arrangement has to be subjected to a high degree of frequency compensation, which in turns leads to a further reduction of the bandwidth. The consequence of this is that the gain decreases on account of the low bandwidth as the frequency increases, thereby bringing about a distortion of the input signals to be amplified.
Consequently, a further disadvantage of conventional circuit arrangements with differential amplifiers is that only a small gain bandwidth can be achieved.
FIG. 5 shows a circuit arrangement for the differential amplification of a differential input signal into a corresponding differential output signal according to the prior art.
As shown in FIG. 5, a common-mode voltage is determined by means of a voltage divider between the two outputs of a differential output stage of the circuit arrangement. The common-mode reference voltage is compared with a reference voltage in a reference stage formed with two reference transistors and with two reference loads. In this case, the reference transistors are formed as a first reference differential transistor and a second reference differential transistor.
In differential amplifiers limited by a 1/f noise, this common-mode control can be used only when the common-mode control either has a low DC voltage gain or is very slow. The transistors used for this common-mode control have a large area, which means that they have a large gate area, as a result of which the 1/f noise is reduced. The current mirror thus formed has the effect of introducing into the common-mode control loop an additional pole which leads to the circuitry disadvantage that stability problems occur in the common-mode control.